1. Field of the Invention
The present invention relates to a flat panel display technique. More particularly, the present invention relates to a shift register, and a display driver using the same.
2. Description of Related Art
Recently, with a booming development of semiconductor techniques, portable electronic products and flat panel displays are developed. In various flat panel displays, the liquid crystal display (LCD) becomes popular in the market due to its advantages of low voltage operation, no radiation scattering, light-weight and small-size etc. Accordingly, miniaturization and low cost of the LCD are general trends in development of the LCD. To reduce a fabrication cost of the LCD, a method of directly fabricating multi-stage shift registers on a glass substrate via thin film transistors (TFTs) is provided by some manufactures, so as to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced.
FIG. 1 is a circuit diagram illustrating a conventional 3-stage shift register directly fabricated on a glass substrate. FIG. 2 is a diagram illustrating operation timings and voltage simulations of a 3-stage shift register of FIG. 1. To clearly describe defects of each shift register stage, a transistor Q1, a start pulse STV, clock signals CK1˜CK3, a gate low-level voltage VGL, and output nodes OUT1˜OUT3 are designated in FIG. 1.
Referring to FIG. 1 and FIG. 2, a shift register 100 may shift a data bit from a previous shift register to a next register within one clock cycle according to three clock signals CK1˜CK3 respectively having 120 degrees phase differences there between. Generally, when the output node OUT1 has a high level, it represents the next shift register receives the high level, and now a gate of the transistor Q1 has to be low level, and therefore the transistor Q1 is in a turned-off state. However, when the output node OUT1 has a low level, the gate of the transistor Q1 has to be the high level, and therefore the transistor Q1 is in a turned-on state.
Accordingly, the transistor Q1 of each shift register stage is turned on for ⅔ of a total time. Moreover, number of stages of a general shift register has to be matched with a resolution of the LCD panel. Therefore, the turning on time for the transistor Q1 of each shift register stage is prolonged, and therefore a stress taken by the transistor Q1 of each shift register stage is enormously great. Moreover, FIG. 3 is a diagram illustrating current-voltage curves of a thin-film transistor when a gate thereof is under a high voltage. Referring to FIG. 3, it is obvious that the longer the stress being exerted to the transistor Q1, the greater the gate voltage is required for turning on the transistor Q1. Therefore, when such type of the shift register is directly fabricated on the glass substrate to replace the scan driver commonly used in prior art, reliability thereof is doubtable, and therefore actual application of such technique for a mass production cannot be implemented.